The present application relates to a storage control device. The present application specifically relates to a storage control device, a storage device, and an information processing system for a non-volatile memory, a processing method thereof, and a program for executing the method by a computer.
A dynamic random access memory (DRAM) or the like is used as a work memory in an information processing system. The DRAM is normally a volatile memory, and loses stored content therein when supply of power is stopped. Meanwhile, in recent years, a non-volatile memory (NVM) has been used. The non-volatile memory is broadly divided into a flash memory corresponding to a data access using units of a large size, and a non-volatile random access memory (NVRAM) which can perform a rapid random access using small units. Herein, a NAND-type flash memory is used as a representative example of the flash memory. Meanwhile, a resistance RAM (ReRAM), a phase-change RAM (PCRAM), a magnetoresistive RAM (MRAM), or the like is used as the non-volatile random access memory.
In general, in the non-volatile memory, data is read out by applying a voltage with respect to a memory cell. As the data is read out, the memory cell receives stress caused by the voltage. By repeating the reading-out of the data, that is, repeatedly applying stress caused by the voltage with respect to the memory cell, written data may be destroyed and an erroneous value may be read out from the memory cell. With respect to this, a technology of performing correction of data using an error correction code and rewriting the corrected data to a non-volatile memory to prevent data destruction, when an error is detected from the read-out data has been proposed (for example, see Japanese Unexamined Patent Application Publication No. 06-1107931.